The present invention relates to the testing of devices. More particularly, the present invention relates to the testing of a self-evaluating device.
When a device is manufactured, testing may be performed to verify that the device operates properly. For example, a logic device, such as a processor used in a personal computer, may be tested to verify that the logic device properly performs various functions.
FIG. 1 is a block diagram illustrating a known testing unit 100 and a device being tested 150. The testing unit 100 includes a storage unit 110, such as a memory, that stores test data. The test data is sent to the device being tested 150 through a communication port 120. If the device being tested is a processor, the communication port 120 may have a large number of channels, such as several hundred channels, that stimulate the processor by sending test data to the processor""s input pins. A large number of sets of test data, such as several million test xe2x80x9cvectors,xe2x80x9d may be sent at a high frequency to thoroughly test the processor""s operation.
The device being tested 150 receives the test data and produces test result data. For example, a processor may receive instructions through input pins and generate results that are available through the processor""s output pins. The test result data is received by the testing unit 100 through another communication port 130, which may also contain a large number of channels. The testing unit 100 can sample, or xe2x80x9cstrobe,xe2x80x9d these channels to capture the test result data.
The testing unit 100 includes a comparing unit 140 that compares the test result data with expected test result data stored in the storage unit 110. Based on the comparison, test status data, such as a xe2x80x9cpassxe2x80x9d or xe2x80x9cfailxe2x80x9d indication, is generated by the testing unit 100. For example, a processor may be expected to generate a certain result when provided with a known set of instructions. By comparing the actual result with the expected result, the testing unit 100 can evaluate if the device being tested 150 is functioning properly.
The use of such a testing unit 100, however, has several disadvantages. Unless the number of channels used in the communication port 130 is increased, only a single device 150 can be tested at a given time. For example, if each device being tested has 300 output channels, the communication port 130 would need 900 channels to simultaneously test three devices. That is, the testing unit would receive three sets of test result data, each using 300 channels. Moreover, the testing unit 100 may need additional comparing units to evaluate the test result data from the three devices. These changes would increase the cost of the testing unit 100.
As a result, known testing units 100 evaluate devices one at a time, in series, which increases production testing throughput time and ultimately increases the cost of the device. If multiple devices must be tested in parallel, separate testing units, which can cost millions of dollars each, are required. In addition, using additional testing units may require additional floor space and maintenance, which also increase the cost of the device.
It is also known that a device can incorporate a limited xe2x80x9cself-testxe2x80x9d or xe2x80x9cbuilt-in-testxe2x80x9d function. These tests, however, do not use external test data and/or expected test result data, and the coverage of such tests are relatively low. For example, a built-in-test may not be able to generate the millions of test vectors required to completely test the device. In addition, even a limited built-in-test can make the design of the device extremely complex. Moreover, because the built-in-test is designed within a device, it cannot be easily modified.
In accordance with one embodiment of the present invention, an apparatus for testing a device comprises a test data communication port adapted to output test data to the device. The apparatus also comprises an expected test result data communication port adapted to output expected test result data to the device.
In accordance with another embodiment of the present invention, an apparatus comprises a test data communication port adapted to receive test data from a testing unit. The apparatus also comprises an expected test result data communication port adapted to receive expected test result data from the testing unit.